Broadcom Memory Circuit Design CAE Automation Engineer 

United States, Minnesota 

750949543

Job Responsibilities

• Python software development in a dynamic, fast paced environment.

• Provide rapid response support to our memory design team to ensure on time, high quality delivery

• Work with memory design teams to automate the transistor level design and verification flow, and deploy this flow across multiple geographical sites

• Work with IT infrastructure team to debug and provide solutions for infrastructure problems related to compute load and disk/filer issues.

Required Skills

• Strong skills in Python programming (preferred) or other popular dynamic computer programming language(s).

• Good understanding of transistor level circuit behavior.

• Good understanding of statistical analysis including Monte Carlo circuit analysis

• Understanding of spice netlist formats and spice simulation.

• Bachelor's degree in EE or related field and 5+ years experience in CMOS VLSI circuit design with an emphasis on design automation

Preferred skills

• Strong Linux and shell scripting skills.

• Knowledge of memory architectures including SRAMs, Register-files, Multi-ports, ROM

• Knowledge of CMOS fabrication methods, digital circuits and device physics.

• Familiarity with Verilog modeling, and Liberty model format for timing and power analysis

• Experience using industry standard EDA tools including spice circuit simulators (Primesim, Spectre, etc.) and layout parasitic extraction tools (STAR, QRC, etc.)

• MS or PhD in EE or related field and experience in CMOS VLSI circuit design with an emphasis on design automation.

Communication / Intrapersonal Skills

• Good communication, interpersonal, and leadership skills

• Motivated, self-driven and detail oriented, can multi-task and work within deadlines.

Compensation and Benefits

The annual base salary range for this position is $78,000 - $130,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.