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Google Senior CPU Design Verification Engineer Silicon Taiwan, New Taipei 72083623
12.06.2024
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 5 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
- Experience developing and maintaining verification testbenches, test cases, and test environments.
Preferred qualifications:
- Master’s degree in Electrical Engineering, Computer Science, or related field.
- Experience with UVM, SystemVerilog, or other scripting languages such as Python, Perl, Shell, Bash, etc.
- Knowledge of general purpose operating systems such as Linux and Android.
- Familiarity with ARM Instruction Set Architecture.
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