• As a senior member of our SoC physical design team, you will be performing various electrical analyses at the block or chip level, including but not limited to: Gridcheck, ESD, Static/Dynamic IR, EM, Noise and Signal EM.• You will collaborate with the CAD/library/circuit technology/system teams for tech/flow evaluation, bring-up, validation and qualification for SoC chip development.• You will also work with the implementation team during the entire chip design cycle to drive EMIR test planning, analysis support, and sign-off closure for tape-out.• You will manage schedules and support cross-functional engineering efforts for the success of Apple’s SoC product development.