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We are currently seeking an experienced Formal Verification Engineer with strong CPU and verification fundamentals to work in NVIDIA's CPU verification team. NVIDIA builds CPUs that powering up the next generation AI and HPC workloads:
This position will have you crafting and optimizing formal verification flows across CPU projects and resolving tool issues for design teams with tool vendors. Additionally, you'll verify the micro-architecture using formal verification tools to employ the latest model checking and equivalence checking techniques. You will be expected to understand the design & implementation, define the verification scope, and ensure design correctness. You will use advanced formal techniques to obtain full proofs, or sufficient bounded proofs, of the design while working with architects, designers, pre- and post-silicon verification teams to accomplish your tasks.
What you’ll be doing:
The specification, implementation, and maintenance of an integrated end-to-end formal verification flow for the formal verification team.
Developing scripts to automate the verification process.
Review formal setups and proofs with design and verification teams.
Maintain and extend assertion libraries, including support for both simulation and FV.
Identifying key behaviors for verification of DUT and creating a verification plan.
Developing verification environment including environment assumptions, assertions and cover properties in context of the verification plan.
Applying various FV techniques to prove correctness of digital designs.
Debugging RTL to identify causes of failure scenarios.
What we need to see:
Bachelors/Mastersin Electronics & Communications or Computer Science or electrical engineering from a reputed engineering college.
Minimum 5+ years of industry experience on formal techniques for verification.
Strong analytical skills to tackle hard problems.
Excellent command of scripting.
Strong knowledge of architectures of CPU designs and digital logic.
Good understanding of abstraction techniques for effective verification.
Hands-on experience with HDLs such as Verilog / System Verilog.
Understanding of temporal logic assertions.
Preferable experience with a variety of Formal Verification Tools
Strong communication skills are required along with the ability to work in a dynamic product oriented team and collaborate effectively across sites.
Ways to stand out from the crowd:
Worked on various pieces of CPUunit/microarchitectureverification
Background with complex verification projects that had used formal techniques for closure.
Experience of collaborating with geographically diverse cross-functional teams
A history of mentoring junior engineers and interns a huge plus.
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