Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
3 years of experience with computer architecture concepts, including microarchitecture, cache hierarchy, pipelining, and memory subsystems.
Experience with Application-specific integrated circuit (ASIC) low power flows and power management concepts.
Preferred qualifications:
Master's degree in Science or PhD in Electronics or Computer Engineering.
Experience with low power architectures/optimization techniques (e.g., clock gating, power gating, multi Vth, Dynamic Voltage and Frequency Scaling (DVFS)).
Experience with ASIC design flows from concept to post-silicon with Central Processing Unit, MultiMedia, Image Signal Processing.
Experience with ASIC power modeling/estimation, power goals, power management IP, peak power management, detection or mitigation, in-rush current, adaptive clock distribution or power/voltage domains design and power analysis.
Knowledge of software and architectural design decisions on system power and thermal behavior.