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Apple Design Timing Engineer United States, Texas, Austin 715046188
07.09.2024
Description
As the CPU Design Timing Engineer, you will be responsible for the timing closure of the project. Responsibilities include but are not limited to:- Working extensively with CPU micro-architects and implementation engineers to drive timing closure for the CPU
Minimum Qualifications
- - Minimum BS
Preferred Qualifications
- - The ideal candidate will have implementation experience on high performance CPU designs including at least one project that includes ownership of timing analysis
- - Working knowledge of CPU microarchitecture including common critical loops for timing and understanding of low power microarchitecture and implementation techniques for CPUs
- - Deep knowledge of static timing tools and flows including how to handle multiple clock and power domains and other complex scenarios
- - Physical design knowledge of device physics and in particular aspects which impact timing (cross talk, noise, OCV etc.)
- - Prior experience owning the timing flow on a major CPU or similar project
- - Good understanding of physical design tools and methodology including but not limited to physically aware synthesis and place & route tools and flows, extraction, STA, and other analysis flows, and physical design verification (LEC, DVS, etc.)
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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