Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
3 years of experience verifying digital logic at RTL level using SystemVerilog or C/C++.
Experience creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (i.e., microprocessor cores, hierarchical memory subsystems).
Experience with scripting languages and software development frameworks.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Science or equivalent practical experience.
Experience in one or more of the following areas: Caches Hierarchies, Coherency, Memory Consistency Models, DDR/LPDDR, PCIe, Packet Processors, Security, Clock and Power Controllers.