Microsoft Principal Silicon Architect 

United States, California, Mountain View 

69564900

Required Qualifications

• 9+ years of related technical engineering experience
  • o OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience
  • o OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience.
• 8+ years of experience in architecture and design experience in large scale System on chip (SoC)
• 5 + years of experience in of SoC facilities required for production needs.
• 5 + years of experience in design of IPs and SoCs.

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• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Preferred Qualifications

• Experience with failure mode estimation and modeling is a plus
• Experience with ARM Coresight components is a plus
• Experience with SOC used in data center is a plus
• Excellent communication skills.
• Ability to read and write detailed architectural specs.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

Microsoft will accept applications for the role until August 16, 2024.

• Work with system and software architects to define technical Requirements & Architecture Specifications related to boot/reset, reliability, telemetry, debug infrastructure.
• Drive evaluation and provide recommendations for technology, IP, and vendor selection.
• Work with modeling and performance teams to capture performance details and requirements. Help identify performance bottlenecks.
• Support design and verification in pre and post silicon to ensure features meet the architectural requirements.