Bachelor's degree in Hardware Engineering, Electrical Engineering, Material Science, Physics, or equivalent practical experience.
6 years of experience in applying Design for Reliability techniques.
Experience in ASIC industry and package reliability testing (e.g., HTOL, ELFR, ESD, LU, TC, THB, HAST).
Experience in semiconductor device physics, transistor reliability physics, CMOS technology or manufacturing.
Preferred qualifications:
Master's degree or PhD in Hardware Engineering, Electrical Engineering, Material Science, Physics, or equivalent practical experience.
Experience in semiconductor device physics, transistor reliability physics (e.g., HCI, BTI, TDDB, EM), advanced CMOS technology, semiconductor materials, and manufacturing.
Experience in ASIC devices and package reliability testing (e.g., HTOL, ELFR, ESD, LU, TC, THB, HAST) and reliability qualification of ICs according to JEDEC standards.
Experience in statistical analysis (e.g., Design Expert, JMP, Weibull), lifetime, FIT, failure rate projection of semiconductor devices and components.
Experience in semiconductor failure analysis tools such as SEM, TEM, FIB, EDX, CSAM, Nanoprobe, X-Ray imaging, De-encapsulation.