Intel SoC Logic Design Engineer Intermediate / Senior 

Canada, British Columbia, Vancouver 

677102995

Job Description:

The Design Engineer:

• Perform logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs.
• Participate in the development of Architecture and Microarchitecture specifications for the Logic components at the IP and/or the SoC level.
• Excellent problem-solving and interpersonal skills, as well is good written and verbal communication skills.
• Willingness to work cross-geo/site when needed to accomplish results.
• Coaching and mentoring junior team members.
• Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Qualifications:

What we need to see (Minimum Qualifications):

• Bachelor's degree in electrical engineering, computer engineering, computer science, or other relevant STEM related field of study and 4+ years of experience in Logic RTL Design Implementation.
• Master's degree in electrical engineering, computer engineering, computer science, or other relevant STEM related field of study and 3+ years of experience in Logic RTL Design Implementation.

How to Stand Out (Preferred Qualifications):

• Experience in High-level Synthesis in addition to Verilog and SystemVerilog
• Experience In C/C++ programming
• Experience with scripting languages
• Post graduate degree electrical engineering, computer engineering, computer science, math or in any STEM related field.
• Low power uArchitecture and UPF experience (e.g., architecture, design, verification, etc.)
• Formal verification experience (assertion-based testing)
• Experience with UCIE, DDR, Ethernet, and/or PCIe/CXL protocols
• Experience with DFT (design for test)
• Experience implementing digital logic designs in FPGA systems or other emulation methods.
• Experience with adjacent areas of the SoC development process (e.g. synthesis, CDC/RDC, static timing analysis, formal equivalence checking, UVM Verification etc.)

Note: This position is primarily remote with periodic meetings in the Vancouver area.

Experienced HireShift 1 (Canada)Canada, Vancouver
Position of Trust

Annual Salary Range for jobs which could be performed in Canada