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Apple Early Careers Physical Design Engineer m/f/d Germany, Bavaria, Munich 668358670
21.04.2025
As a member of our Physical Design team in this highly transparent role, you will directly own implementation of design partition(s) (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology. Responsibilities include especially, but are not limited to: You are going to own block level PnR, floor-planning, clock and power distribution. You will get involved with static timing closure with commercial tools. You will do power and noise analysis (EM / IR-Drop / Xtalk) as well as layout verification (DRC / LVS). You will be developing and validating high performance low power clock network guidelines. With phenomenal focus you will resolve design and flow issues related to physical design, and identify potential solutions whilst driving execution. You know what documentation should look like, and will help with guidelines and specs.
- Understanding of hierarchical design approach, top-down design, and timing and physical convergence.
- Understanding of static-timing analysis, know-how in clock/power distribution and analysis, as well as RC extraction and correlation.
- Experience with Place & Route ('PnR') tools available today (Synopsys /Cadence) is beneficial
- Experience with SoC practices such as multiple voltage and clock domains, integration of mixed-signal IPs & I/O integration.
- Experience with scripting and programming in Perl, TCL and/or Make.
- Ability to fluently speak and write in English
- Excellent communication skills, and like the rest of us here at Apple, you love working in an open and multi-cultural environment
- Solid understanding in Verilog is beneficial.
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