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Microsoft Senior IP Verification Engineer Taiwan, Taoyuan City 627608465
17.07.2025
Intelligent Cloud
Required Qualifications:
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience
- OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience
- OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
- 4+ years of pre-silicon subsystem or IP verification experience.
Other Qualifications
- Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
Additional or preferred qualifications
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
- OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
- OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.
- Understanding of cache coherency architectures and microarchitectures
- Demonstrated experience in verifying designs that utilize Coherent Hub Interface (CHI), Advanced Microcontroller Bus Architecture (AMBA) protocols, or other fabric protocols
- Experience with verification for a full product cycle from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff
- Experience creating, maintaining, or integrating test benches, checkers and stimulus using Universal Verification Methodology (UVM), System Verilog Test Bench (SVTB), and optionally Python based post-processing checking
- Aptitude for writing scripts/software with industry standard languages like Python
- Experience applying generative AI to day-to-day tasks
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
Microsoft will accept applications for the role until July 31, 2025.
Responsibilities
- Own verification of complex flows at Fabric Interconnect or at block level
- Learn about the design and interact with partner teams to define verification strategies and test plans
- Develop verification environments and run and debug simulations to drive quality
- Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
- Innovate to improve verification efficiency through methodologies or tools
- Apply industry leading generative AI solutions to verification work
- Coach and mentor others in your areas of expertise
- Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
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