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Google ASIC Design Testability Engineer Silicon 
India, Karnataka, Bengaluru 
616427626

15.07.2024
Minimum qualifications:
  • Bachelor's degree in Mechanical Engineering, Electrical Engineering, Industrial Engineering, or equivalent practical experience.
  • 3 years of experience in Design for Testability.
  • Experience with any one of ATPG, LV, BIST, JTAG tools and flow.

Preferred qualifications:
  • Experience with a scripting language such as Perl.
  • Experience with Synthesis, Logic Testing, and ATPG.
  • Knowledge of design DFT techniques used for logic testing.
  • Ability to scale DFT, with a focus on minimal area overhead.