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Apple Early career - Cellular IP Design Engineer m/f/d Germany, Bavaria, Munich 609160979
06.06.2024
Description
As a Cellular design engineer, you will be responsible for developing, integrating & verifying IP sub-components for a cellular transceivers System on Chip. You would be responsible for defining and driving the implementation, timing closure, and power optimizations in close collaboration with a multi-disciplinary group from system, digital-, analog & firmware design, to design verification, and physical design teams which will support your daily work. Your work will not be limited to design and will cover end-to-end responsibility across the project life-cycle of the IPs developed from concept to design, to verification, integration, silicon validation, and finally in-field operation.
Key Qualifications
- The ideal candidate will possess the following qualifications:
- Experience with crafting low-power customized hardware for digital signal processing. Understanding of signal processing principles. Abstract modeling skills for synthesis and simulation using modern modeling languages.
- Good experience in sophisticated ASIC designs, IP integration and digital development flows.
- Knowledge of ASIC design flow and netlist flow checks – Lint, CDC, Logical Equivalence.
- Proficient in using (System)Verilog/VHDL, capable of analyzing RTL/Netlist designs, and excellent debugging skills to solve technical challenges.
- Proficient in day-to-day usage of scripting languages (TCL, Python, Perl, shell), Linux and revision control systems (e.g. Perforce), database management, and releases.
- Passion for owning/driving design schedules using well-defined metrics, a strong initiative, and ownership of responsibilities, productive, able to meet daring deadlines.
- Very good interpersonal skills, ability to clearly communicate abstract concepts to different customers. Excellent problem-solving skills and the ability to find effective technical solutions between partners in RTL-Design, Firmware, System Engineering, Power, and Physical-Design teams.
- Experience with AXI/AHB bus fabric and processor sub-systems would be a huge plus.
- Experience with synthesis, logic equivalence or ECO techniques would be helpful
Education & Experience
- Bachelor's Degree in Electrical Engineering, Computer Science/ Software Engineering or equivalent.
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