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Google Machine Learning SoC Engineer Architecture System Integration 
United States, California, Sunnyvale 
595791054

04.04.2024
Minimum qualifications:
  • Bachelor's degree in electrical/computer engineering, computer science, a related field, or equivalent practical experience.
  • 3 years of experience in Verilog or SystemVerilog.
  • 1 year of experience bringing up hardware functionality through Simulations/FPGAs/Emulation.
  • Experience working on ASIC/FPGA design or verification.

Preferred qualifications:
  • Master's degree or PhD in electrical/computer engineering, computer science, or a related field.
  • 3 years of experience working on FPGA platforms or Emulation platforms with IPs (e.g., PCIe, DDR memory, Gigabit Ethernet, Flash).
  • Experience developing architectures for Machine Learning Accelerators.
  • Experience writing/debugging verilog/RTL code for ASIC/FPGA designs and waveform debug skills.
  • Experience developing HW prototypes/SW models for early software development and develop end-to-end System validation strategies for an ASIC/FPGA product.
  • Solid fundamentals in two of the following areas: computer architecture, FPGA system design, Interface IPs (DDR/PCIe/GbE).