Intel SoC Design Verification Engineer 

Malaysia, Penang 

584650972

Responsibilities:� Understand DFT architecture and develop Pre-silicon DFT/HVM validation tests to verify design quality. � Create test plans for RTL validation, define and run simulation models, find and implement corrective measures for failing RTL tests. Analyze and use results to modify testing. � Coordination of design collaterals with IP provider.� Involve in test pattern generation and verification process using industry standard tools.� Retargeting of partition level/IP patterns to top level via iJTAG, SSN etc.� Deliver validated HVM patterns to post-Silicon High Volume Manufacturing (HVM) partner teams for silicon testing usage.� Partner with post-Silicon HVM Team to enable DFT test capability in silicon.� Support debug of any test content failures including silicon diagnosis in the post-Silicon/HVM environment.Bachelor of Engineering degree or a Master of Science degree in Electronic, Electrical or Computer Engineering, or equivalent with preferably at least 5 years of experience.Hands-on experience in RTL Design/integration , Physical design (Structural Design) and STAin scripting proficiency (perl, python, etc) to automate design process and improve efficiency.Ability to communicate well with counterparts and key stakeholders.Experienced HireShift 1 (Malaysia)Malaysia, PenangMalaysia, Kulim