מציאת משרת הייטק בחברות הטובות ביותר מעולם לא הייתה קלה יותר
As part of the team, you will be working across different teams within the organization: architecture, technology development, IP designers, package and platform engineers to design and integrate best in class Hard IPs.Responsibilities for this role include, but are not limited to:
Design, simulation, characterization, and integration of on-die power delivery circuits such as: LDOs, power gates, voltage monitors.
Work with architecture team to define and deliver the next generation of Hard IPs for future SOCs.
Design, simulation, characterization and integration of circuits and components such as PLLs, DLLs, system monitors: thermals, voltage, clock.
Behavioral traits:
Willing to work effectively both independently and as a team.
Technical leadership with good communication skills.
Advanced interpersonal and problem-solving skills.
Willing to work across the organization to achieve goals and thrive in a team-orientated environment.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of yourschoolwork, classes, researchand/or relevant previous job and/or internship experiences.
The candidate must have a bachelor's or master's degree in electrical/computer engineering or related field and 2+ years of relevant experience. Experience should include:
Analog circuits design
Solid foundation knowledge of SOC design, timing analysis and reliability analysis.
Upper Intermediate to Advanced English level.
Preferred Qualifications
PhD in Electrical/Computer Engineering or related field.
2+ years of experience working with mixed signal design and post-silicon debug.
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