Amazon Senior ATE Test Engineer 

India, Karnataka 

492927585

Key job responsibilities
As a Senior Test Engineer at Amazon, you will play a critical role in new product introduction, leading first silicon bring-up, production ramp-up, and yield optimization. You will work closely with OSAT (Outsourced Semiconductor Assembly & Test) vendors to develop ATE test methodologies, board design, and debug strategies, ensuring product performance, manufacturability, and cost efficiency. This role also involves hands-on debugging on ATE testers for rigorous characterization and correlation with Bench (SLT).Key job responsibilities:• First Silicon Debug & Characterization – Collaborate with Design and OSAT Test Engineering to debug first silicon, execute rigorous characterization, and perform SLT correlation.
• ATE Debug & Correlation – Perform hands-on debugging and code bring up on ATE, conduct bench correlation and root cause analysis for yield loss mechanisms.
• Test Development & Optimization – Define test program flows and methodologies to achieve comprehensive test coverage, efficient test time, and cost optimization.
• Yield Analysis & Improvement – Analyze engineering sample data, characterize NPI product performance, and optimize manufacturing yield windows through statistical data analysis and failure analysis techniques.
• Production Readiness & OSAT Management – Finalize wafer-sort and final test programs, oversee early production stages, and drive product to meet yield and test cost targets.
• Knowledge Transfer & Sustaining Support – Work closely with OSAT sustaining engineers, ensuring seamless product knowledge transfer and ongoing test optimization.
• Board Design & Debug – Contribute to test hardware development, including load board, probe card design and HW qualification for Mass production.

• Bachelor's or Master’s degree in Electrical Engineering, Electronic Engineering, or a related field.
• Minimum 7years of experience in semiconductor test engineering, ATE test development, yield analysis, yield improvement and production ramp up.
• Hands-on experience with ATE test coding, first silicon debug (ex. SCAN, MBIST, DDR), PVT characterization and test time optimization.
• Proficiency in ATE test methodologies, including wafer-sort and final test program development.
• Proficiency in board design, including load boards, probe cards, and interface hardware.
• Expertise in statistical ATE data analysis, failure analysis techniques and root cause identification.
• Excellent communication skills with the ability to collaborate across design, product, and manufacturing teams.
• Willing to travel for short-term onsite support at OSAT locations during silicon bring-up and mass production.

• Strong ATE debugging skills, with experience on platforms such as J750 and UltraFlex (IGXL platform preferred).
• Experience managing OSAT engagements, including sustaining support, yield ramp-up, and test cost efficiency.
• Advanced understanding of semiconductor fab process technology, device physics, and failure mechanisms.
• Basic understanding of DFT methodologies, including scan diagnostics, ATPG, BIST, DDR, and test coverage analysis.
• Strong cross-functional collaboration skills, working closely with Design, Product Engineering, Reliability and Bench (SLT).
• Proven experience driving test efficiency, quality improvements, and cost reductions.
• Ability to thrive in Amazon’s fast-paced, ambiguous environment, making data-driven decisions with high ownership and a customer-centric mindset.
• Experience in post-silicon logic debug, including DFX feature validation, scan/memory dump analysis, and recommending additional tests for improved system-level and DV coverage.