Nvidia Senior System Change Analysis - DFT Engineer 

Israel, North District 

492516444

.NVIDIA Networking division is a leading supplier of innovative end-to-end InfiniBand and Ethernet connectivity solutions and services for servers and storage. We offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. Our products optimize data Center performance and deliver industry-leading bandwidth and scalability. In addition, we serve a wide range of markets including high performance computing, enterprise, data centers, cloud computing, big data, and Web 2.0. We are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry.

What you’ll be doing:

• Leading optimal product changes and analysis impact on testing includes HW, SW, FW, Mechanical fixtures, and cables/harnesses for customized production testing setups

• Responsible for product testing maximum coverage, Testing specification documents, and production test flow process for each system

• Supporting production ramp-up and scalability, lead, and fast responding time for ECR/ECO implications

• Examine New Technologies, testing capabilities, and their implementation for the next-generation products.

• Ensure testing setups and coverage meet the DFT requirements and timetable!

• Lead DFT Risk assessment and drive mitigations to reduce the risks

• Be the Technical POC in mass production and source of knowledge in SPE GMP organization for DFT & testability-related issues

• Working closely with a variety of teams: R&D, HW, SW, Chip design, Operations, thermal, signal integrity, FW, and layout

The position combines an understanding of HW, SW, and system manufacturing processes.

What we need to see:

• BSc, MSc Electrical Engineering with 5+ years of experience

• Integration capabilities of self-task management, vast electronic knowledge, production, and testing process know-how

• Background in working with contract manufacturers and suppliers

• Minimum 4 years of experience as a DFT engineer at chip/system level, as Board Design engineer, or as system architect

• Drive the execution of tasks at a matrix organization

Personal skills: proactive and self-instruction, good interpersonal relationships, multitasking, well organized, and a quick learner