Intel IP Design Micro-Architect / Lead 

Malaysia, Penang 

475261614

Minimum Qualifications� Bachelor of Science degree or Master of Science degree in Electrical/Electronic Engineering, Computer Engineering or Computer Science.� At least 15 years of experience in designing FPGAs, SoCs or IP blocks.� In depth knowledge of RTL language such as System Verilog, Verilog or VHDL.� In depth knowledge of industry standard tools and methods such as Synopsys VCS, Mentor/Siemens Questasim, Cadence Xcelium, etc.� Excellent technical leadership skills, and a proven ability to work with dynamic schedulesPreferred Qualifications� Knowledge of 5G (O-RAN, eCPRI, Front-Haul Compression, JESD) protocols and usage models.� Knowledge of object-oriented programming in TCL, Java, Python, or some other languages.� Behavioral traits including but not limited to strong communication skills (written and verbal), tolerance of ambiguity, problem solving, teamwork, attention to detail, commitment to task, and quality focus.� Experience with FPGA SW development platform especially on Altera Quartus Pro.� Experience in system interconnect bus such as AXI, AHB, AVMM, etc.� Knowledge in Agile development and familiar with Scrum process.We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits