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Google Design Verification Engineer Silicon Engineering 
India, Karnataka, Bengaluru 
458344989

31.07.2024
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • Experience in verifying digital logic at Register Transfer Logic level using SystemVerilog and Formal Verification Techniques.
  • Experience with verification techniques, System Verilog Assertions, and assertion-based verification.

Preferred qualifications:
  • Master's degree in Electrical Engineering or Computer Science.
  • Experience creating and using verification components and environments in a standard verification methodology such as UVM.
  • Experience with Interconnect Protocols (e.g., AXI, ACE, CHI, CCIX, CXL).
  • Architectural background in one or more of: Memory Management, Caches Hierarchies, Coherency, DDR/LPDDR, PCIe, or Packet Processors.