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Apple Analog Verification Flow M/F/D Germany, Bavaria, Munich 456618055
18.11.2024
Description
In this role you will be responsible for studying the spec driven custom design methodology and the automation of measurements vs simulation data generation, collection and comparison.In this role, you will be taking part in the design and implementation of a verification flow for Analog IPs.
Minimum Qualifications
- Basic knowledge of Analog circuits.
- Basic knowledge of Cadence Virtuoso design platform.
- Excellent programming skills (Python, Perl or SKILL would be a plus).
- Hands-on experience in designing/verifying analog circuits would be a bonus.
- Previous internship or experience in a similar field would be an advantage.
- Should be a teammate with excellent written and verbal communication skills and have the desire to take on diverse challenges with international teams.
Preferred Qualifications
- Currently enrolled in a Master Degree program in Electrical Engineering or Computer Science or equivalent.
- Available for 6 months
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