Intel Logic Verification Engineer 

China, Liaoning, Dalian 

454347960

As a Logic Verification Engineer, you will play a pivotal role in ensuring the integrity and performance of our 3D NAND designs. Your expertise will be crucial in verifying that our designs meet stringent specifications and in driving the development of verification strategies that lead to robust and reliable products.

Key Responsibilities:

• Perform rigorous logic verification of 3D NAND designs, validating compliance with design specifications.
• Craft detailed verification plans, construct test benches, and develop comprehensive full-chip models to achieve thorough verification coverage.
• Implement verification strategies, execute system simulations, analyze power and timing, and proactively identify and resolve bugs.
• Troubleshoot and resolve hardware and firmware issues within the pre-silicon environment.
• Engage in cross-functional collaboration with architects, RTL developers, and physical design teams to enhance verification processes and achieve design objectives, including functional, performance, and power targets.
• Sustain and refine the existing functional verification infrastructure and methodologies to align with industry best practices.
• Generate pre-silicon functional validation tests to confirm that the system will fulfill design requirements.
• Formulate test plans for RTL validation, operate system simulation models, and institute corrective actions for failing RTL tests.
• Analyze verification results and adjust testing approaches as necessary to ensure comprehensive coverage.

Qualifications

• A Master's degree in Computer Engineering or Electrical Engineering with at least 2 years of relevant experience, or a Bachelor's degree in Computer Engineering or Electrical Engineering with 3+ years of relevant experience.
• Profound understanding of computer architecture, particularly out-of-order processor execution.
• Proficiency in hardware modeling languages such as Verilog, VHDL, or SystemVerilog, and familiarity with industry-standard logic simulation tools.
• Experience with industry-standard formal verification tools, including but not limited to JasperGold, Questa Formal, and VC Formal.
• Expertise in test bench development using concepts and languages like SystemVerilog UVM/OVM.
• Skills in test writing/generation, checker development, coverage analysis, failure debugging, and root cause analysis.
• Programming proficiency in at least one language such as C/C++, Perl, Python, Ruby, Java, or TCL.
• Experience in pre-silicon verification of SoC, 3D NAND, or DRAM designs is highly desirable.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing BenefitsThis role will require an on-site presence.