המקום בו המומחים והחברות הטובות ביותר נפגשים
Thoroughly understand the design rule intent through discussions and documentations. Candidate should have effective verbal or written communication and analytical problem solving and troubleshooting skills in design rule development.
You will utilize modern design rule development methodologies, programming languages, domain knowledge, test, and release design rule QA collaterals. Facilitate the development and improvement of design rules, ensuring alignment and standardization of rule specifications.
Analyze design rule correlation and dependency, conduct coding assessment and release example DRC runset by identifying and testing corner cases to ensure the PDK quality and performance.
Develop and maintain a comprehensive QA flow and assessment mechanism. Ensure through verification of deliverables to achieve extensive coverage.
Implement the QA flow and conduct regression testing. Develop and maintain specification documents.
Candidate must possess a BS degree with 1+ years of experience or an MS degree in Computer Science, Computer Engineering, Electrical Engineering, or related discipline.
Software programming skills in Python, Perl or, TCL.
Effective communication skills, willing to discuss with teams.
3+ months of semiconductor industry experience.
3+ months experience with Unix/Linux operating system.
Proven ability of issue analysis, problem solving, and bring closure.
Industry standard CAD tools/flows for digital and/or analog design.
CAD tool scripting languages. (e.g. Calibre DESIGNrev, Cadence SKILL)
Minimum of 1 year of experience in DRC runset development using any of the following EDA tools:
-Siemens Calibre
-Cadence Pegasus
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefitsמשרות נוספות שיכולות לעניין אותך