המקום בו המומחים והחברות הטובות ביותר נפגשים
Google Senior Power Management Silicon Validation Engineer Taiwan, New Taipei 440171701
10.06.2024
Minimum qualifications:
- Bachelor's degree in a technical field, or equivalent practical experience.
- 8 years of experience developing random stress tests, silicon validation frameworks, or related infrastructure.
- Experience programming in C/C++, and with ARM architecture.
- Experience in IP level power management, Dynamic and Voltage and Frequency Scaling (DVFS), or SoC/CPU/memory power management.
Preferred qualifications:
- Experience executing tests on emulation platforms or FPGA, and with board level debug.
- Experience with complex system debug, embedded operating systems, and bare metal programming.
- Experience with JTAG debuggers (e.g., Lauterbach).
- Knowledge of low power design and architecture techniques.
- Knowledge of OS fundamentals.
- Familiarity with Power Management Integrated Circuit (PMIC) and power modeling techniques.
משרות נוספות שיכולות לעניין אותך
