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Intel Senior SerDes PHY System Engineer 
India, Karnataka, Bengaluru 
427669655

Today
Job Description:

Key Responsibilities:

  • SerDes PHY Design: Lead the design and development of the physical layer for SerDes systems, including transmitter and receiver architectures, equalization techniques, and signal integrity.
  • Simulation and Validation: Conduct comprehensive simulations using MATLAB and Python, along with lab testing, to validate the performance and compliance of the SerDes PHY, optimizing it for high-speed data transmission.
  • Calibration Techniques: Develop and implement calibration methods to enhance the performance of the SerDes PHY, ensuring high-quality data transmission.
  • Collaboration: Work closely with cross-functional teams, including digital design, hardware, and software, to ensure seamless integration of the PHY layer into the overall SerDes system.
  • Documentation: Maintain detailed and up-to-date documentation of design specifications, test plans, and results.
  • Problem-Solving: Address and resolve complex technical issues related to the SerDes PHY, ensuring optimal performance.
  • Quality Assurance: Implement quality control measures and best practices to ensure the reliability and robustness of the SerDes PHY.
Qualifications:
  • Bachelor's degree in Electrical Engineering; a Master's degree in a relevant field is preferred.
  • Minimum of 5 years of experience in wired or wireless communication systems.
  • Proven experience and enthusiasm for lab work, collaboration, and solution development.
  • Prior experience in DDR/PCI/GDDR7/UCI will be added advantage.
  • Proficiency in scripting and programming languages such as C, C#, MATLAB, and Python.
  • Experience in silicon development and SerDes technologies is advantageous.
  • Strong problem-solving abilities and analytical skills.
  • Self-motivated and capable of executing tasks in uncertain environments.
  • Demonstrated leadership skills and ability to drive initiatives in a matrix organization.
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