Intel Staff STA Design Automation Engineer 

Malaysia, Penang 

427238051

Specifically, you will be part ofDesign Methodology, Automation and Intelligence (DMAI) for Altera’s Silicon Design Engineering (SDE) group

BSEE/MSEE or equivalent in with minimum of 10 years experience in IC Design or Design Automation.
Experience in industry Static Timing Analysis (STA), ECO and Timing Closure flow.
Thorough knowledge in concepts like Crosstalk, On-Chip-Variation is required.
Hand on experience in ASIC/SoC design flows and adjacent methodology development/support is required. Experience in advanced process 10nm and below is a plus.
Programming knowledge: primarily in Python and Tcl as well as Perl, C-shell or other software languages.
Understanding of Liberty Timing Models and their generation.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits