Nvidia DFT Verification Engineer RDSS Intern 

Taiwan, Taipei 

426474243

What you’ll be doing:

• Verify our custom IP macros.

• Collaborate with Design, Integration and TE teams to determine verification scope, develop strategies, implement test planning, and verify designs at IP level, cluster level, and full chip level

• Collaborate with CAD team to optimize & smooth our simulation flow

• Generating testpatterns and perform silicon bring-up

What we need to see:

• Master degree of Electrical Engineering/Computer Engineering/Computer Science

• Strong debugging and analytical skills with RTL/Gate-level design tracing(Verdi) and verification simulation tool(VCS).

• Familiarity with SOC basic architecture (clock, reset, power rail, IO pad, package)

• Understanding of Design for Testing including Scan/ATPG/BIST/JTAG is a plus

• Skills ofPython/Perl/Tck/C/C++is a plus

Ways to stand out from the crowd:

• Fluent English communication is required