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Apple Design Engineer 
Israel, Tel Aviv District 
425214676

Yesterday
Minimum Qualifications
  • 3+ year experience in VLSI design of Processor Cores/SoC.
  • Familiar with advanced design practices (Clock/Voltage domain crossing and Low Power Design).
  • Strong Verilog/System Verilog skills
  • Familiar with CPU/ARM instruction set standard – an advantage
  • Familiar with the various backend tools (synthesis and STA) – an advantage.
  • Experience with scripting and programming experience using several of the following: Perl, C, Python, and TCL.
  • BS.c/ MS.c in EE/ CE
Preferred Qualifications
  • Familiar with verification methodologies – an advantage
  • Familiar with CPU/ARM instruction set standard – an advantage
  • Familiar with the various backend tools (synthesis and STA) – an advantage