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Google Senior CPU Physical Design Implementation Engineer Silicon 
Taiwan, New Taipei 
413537697

10.07.2024

Minimum qualifications:
  • Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
  • 8 years of experience in physical design.
  • Experience in one or more sign-off convergence in Static Timing Analysis (STA) electrical checks and physical verification domains.
  • Experience in high-performance, low-power physical design and implementation techniques with industry standard synthesis and PnR tools.

Preferred qualifications:
  • 3 years of experience in high performance CPUs.
  • Experience in using Static Timing Analysis (STA), power grid network delivery and power analysis tools.
  • Knowledge of computer architecture, logic design (e.g., RTL) and Verilog/SystemVerilog.
  • Knowledge of CPU including iterations for timing and low power microarchitecture and implementation techniques for CPUs.