In this position, you will be responsible for verification design, architecture, and micro-architecture using advanced verification methodologies.
As an intermediate to a senior member of our verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.
Collaborate with architects, designers, emulation, and silicon verification teams to accomplish your tasks.
What we need to see:
B.Sc in Electrical Engineering
3+ years of relevant experience
Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).
Strong debugging, problem-solving and analytical skills.
Strong communication and interpersonal skills are required.
Ability to work in a geographically diverse team environment.
Self-motivated, ability to work independently and drive tasks to completion.
Ways to stand out from the crowd:
Professional verification experience.
Experience in developing test bench environments for unit level verification.
Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies.
Experience developing TB's from scratch using E, SV and UVM methodology is desired.
Experience with System Verilog or E is highly preferred.