KLA FPGA Design Engineer 

Singapore, Singapore 

393221535

Main job responsibilities would include:

• Designing, implementing, and debugging of FPGAs for sensing and communications systems (cameras, sensors, motors etc.)

• Collaborate with cross functional team members to design FPGA Firmware for high-performance mixed-signal systems and solve complex technical challenges

• Develop complex, high-speed, innovative FPGA-based designs including design, verification, simulations, synthesis, place and route, and timing closure.

• Responsible for RTL design and verification, as well as hardware bring-up and debug FPGA for motion control, sensing and imaging systems.

• Optimize FPGA designs for the area, speed, and power to meet system requirements; analyze architectural trade-offs and validate for system sample rate and latency.

• Participate in all phases of FPGA design flow, define FPGA design requirement specifications and develop design projects from concept design to wafer inspection tool production release

• Understand and capture the project specifications and performance requirements on board and system level. Adhere to project timelines and deliverables

• Write technical documentation that meets the defined quality standards as required

These tasks will require working with other engineering groups such as mechanical, optical, software, systems and manufacturing engineers to ensure flawless integration and test at the subsystem and system level.

Requirements:

• Hands on experience with complex FPGA design (Xilinx preferred), FPGA simulation, and FPGA timing analysis

• Proficiency in Verilog or System Verilog

• Proficiency in FPGA simulation tools such as VCS, Modelsim/Questasim or equivalent

• Proficiency in FPGA design tools such as Vivado or equivalent

• Hands on experience with lab equipment such as logic analyzer, oscilloscope

• Solid knowledge of various protocols to interface different peripherals: PCIe, Ethernet, CSSI, DDR4, 10G, SPI, I2C, etc.

• Understand FPGA timing analysis and be enable to solve timing related issues

• Understanding of clock domain crossing (CDC) techniques

• Hands on experience with lab equipment such as logic analyzer, oscilloscope

• Solid knowledge of various protocols to interface different peripherals: PCIe, Aurora, DDR4, 10G, SPI, I2C, etc.

• Solid Knowledge of networking and Embedded Linux build systems

Advantage:

• C/C++ programming language

• Experience with microprocessor based FPGA SOC design (NIOS II, Microblaze or ARM)

• Experience designing DSP and/or image processing datapath

Minimum Qualifications

Doctorate (Academic) Degree and 0 years related work experience; Master's Level Degree and related work experience of 3 years; Bachelor's Level Degree and related work experience of 5 years