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Intel Analog Layout Design Engineer 
India, Karnataka, Bengaluru 
39202351

03.07.2024

You will be designing the layout of sensitive analog components, although not limited to, such as receivers, transmitters, clocking, ADC/DAC PLL and LDO circuitry for High Speed IO's, Ethernet and Foundational IP's in Intel's current and next-generation process nodes.Responsibilities of the role include, although not limited to:� Designs complex layouts of analog signal circuits for a given design specification and runs complete set of design verification tools for process design rules, electron migration, voltage drop (IR), ESD, and other reliability checks on the layouts.� Designs and analyzes floorplans, power grid, ESD, bumps, and performs all required verification on the analog blocks.� Performs the floor-planning and detailed signal planning of complex analog circuits to meet performance and electrical requirements (shielding, matching) for critical signals to optimize for area, power, RV, and performance.� Develops and drives new and innovative analog layout methodologies to improve layout productivity and quality.� Collaborates with analog circuit design, SD, SIPD, process technology, and package design teams to meet design specifications, plan work, and negotiate layout tradeoffs as needed.� Troubleshoots a wide variety of issues up to and including design and tool/flow/methodology used in analog layout design.� Excellent communication and expected to drive clarity across customers, stakeholders, partners, managers by clearly and concisely summarizing problems, status, data, and proposals both orally and in writing.� Excellent teamwork and being flexible in assignment as per project needs.Qualifications:M.Tech in Electronics/Electrical/VLSI Design Engineering with 1+ years or B.Tech Electronics/Electrical/VLSI Design Engineering with 2+ years of relevant experience in Analog and SERDES IO IP design e.g. GPIOs, Thermal Sensor, PLL, ADC/DAC/ Voltage regulators/LDOs, AIB, HBMIO, DDR, HDMI/DP IO, MIPI IO etc.Preferred Qualifications:Analog Device and Metal Layout FundamentalsAnalog/Mixed Signal FundamentalsReliability Verification.Cadence Virtuoso Layout SuiteFull Chip Top Metal/Analog Routing DesignIP Design Planning.We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits