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QT Technologies Ireland Limited
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
Principal Duties and Responsibilities
Define high level specifications and micro-architecture for digital low power IPs.
Carry out front-end design works including but not limited to: RTL coding, simulation, validation plan development, synthesis, timing closure, ECOs, etc.
Collaborate across global teams throughout the process of IPs specification and use cases definition, verification, bring-up and validation, etc.
Demonstrates good understanding of and conducts research on industry trends and innovations in digital low power circuit design to ensure solutions and deliverables align with best practices.
3rd party PHY integration (eusb, usb, hdmi, dprx…)
Prepare technical documentations
What are we looking for?
5 - 10 yrs. industry exp. Master's degree or PhD in Electrical, Electronic, Computer Engineering, or related field. (Or Bachelor with equivalent experience).
Detail oriented with strong organizational, problem solving and communication skills
Experience with complex digital block/sub-system architecture development, design, verification, and integration
Understanding of scalable design consideration
Clock domain crossing design experience
RTL writing skills in Verilog/SystemVerilog
Scripting skills on Linux, TCL and Perl/Python
EDA tools (such as Cadence, Spice, …)
It Would Also Be Beneficial If You Have
Familiarity with different BE and FE views (Layout, LEF, RTL…)
Familiarity with advanced DFT methodologies for stuck-at and at-speed scan modes using On-chip clock controllers.
Understanding of USB and display interface protocols
Understanding of feedback control system theory
Understanding of multi-power domains design
Understanding of coverage driven verification methodology
Understanding of system modelling methodology using high level programming language
Where you will be working
A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.
What's on Offer
Apart from working in an open, relaxed and collaborative space, you will enjoy:
Salary, stock and performance related bonus
Maternity/Paternity Leave
Employee stock purchase scheme
Matching pension scheme
Education Assistance
Relocation and immigration support (if needed)
Life, Medical, Income and Travel Insurance
Subsidised memberships for physical and mental well-being
Bicycle purchase scheme
Employee run clubs, including, running, football, chess, badminton + many more
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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