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Google Asic Design Verification Engineer India, Karnataka, Bengaluru 342407068
14.08.2024
Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Science or equivalent practical experience.
- 4 years of experience in Design Verification with 2 years of experience in formal verification.
- Experience in verifying digital logic at RTL level using System verilog/UVM and FV Techniques.
Preferred qualifications:
- Master's degree in Electrical Engineering or Computer Science, or a related field.
- Experience in one or more of the following: Memory Management, Caches Hierarchies, Coherency, DDR/LPDDR, PCIe, or Packet Processors.
- Experience creating and using verification components and environments in a standard verification methodology such as UVM.
- Experience with verification techniques, System Verilog Assertions (SVA) and assertion-based verification.
- Experience with Interconnect Protocols (e.g., AXI, ACE, CHI, CCIX, CXL).
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