Nvidia HSIO Functional Power Management Lead 

United States, California 

340314879

What you’ll be doing:

• Contribute to design of next generation of high-speed IOs, including NVLink and NVLink-C2C.

• Responsible for IO power optimizations and continuing to push energy efficiency.

• Ensure interoperability with connected devices and system components in complex interconnect topologies

• Deep dive into technically challenging HSIO bugs and help drive debug efforts across various teams

• Work closely and proactively with other engineering teams such as system architects, mixed signal and design, DGX, software/firmware, HW/SW QA, operations and AE teams to drive design, development, debug and release of next generations products.

What we need to see:

• BS or MS degree in EE/CE or equivalent experience

• 8+ years working in HSIO development, bringup planning, HSIO functional and electrical validation, and/or power optimization

• Experience with HSIOs like PCIE or chip-to-chip interconnects including understanding of process/temp/voltage sensitivity on BER.

• Experience with identifying full chip data paths for HSIO saturation and working with applications to stress test for stability.

• Experience with system level and interconnect power management optimizations

• Understanding of firmware/driver structures and their interaction with HW.

• Strong EE fundamentals, knowledgeable in computer architecture, high speed interfaces, timing analysis, process variations, statistical error rates and power analysis.

• Effective in a collaborative environment.