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QT Technologies Ireland Limited
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
As a Verification Engineer, you will be responsible for understanding the expected functionality of multimedia designs, specifically video encoder/decoder and CV hardware IP and subsystem.
You will work with the architects of these multimedia systems, as well as multimedia ASIC designers and SW engineers to plan and execute verification and validation of multimedia subsystems for integration into SoCs for mobile applications.
Job description:
Applies knowledge and experience to architect, design, implement, the testbench to verify the structure and performance computer vision IPs
Creates and maintains verification test benches and environments in System Verilog/UVM
Collaborates with Architecture, Software, Firmware, Design, Modeling, Emulation and Post-silicon validation teams to define and develop test methodology and content
Participate in micro-architecture reviews
Collect, organize and execute various forms of system level test content including directed testcases, standards compliance test suites, and system level scenarios
Build automation for continue integration and testing based on latest IP
Works with team members to understand and align on narrow scope of feature development and meet targets.
Write technical documentation and feature descriptions for straightforward projects under the direction of a supervisor.
Scripting and automation skills (Python, Make, etc)
Formal verification experience is a plus
Qualifications:
Minimum 2 years of DV experience using uvm/assertion based verification technologies
Experience in verifying complex SOC or SOC subsystems
Experience with caches and DDR memory protocol verification
Exposure to firmware/driver development using C++ Exposure to successful tapeouts from conception to post silicon debug
Exposure to Formal verification
Experience with Power aware simulations.
Experience with perf and power verification.
Experience with Gate level Simulations
: UVM, system verilog, assertion, C++, python, Power Aware simulations
Where you will be working
A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.
What's on Offer
Apart from working in an open, relaxed and collaborative space, you will enjoy:
Salary, stock and performance related bonus
Maternity/Paternity Leave
Employee stock purchase scheme
Matching pension scheme
Education Assistance
Relocation and immigration support (if needed)
Life, Medical, Income and Travel Insurance
Subsidised memberships for physical and mental well-being
Bicycle purchase scheme
Employee run clubs, including, running, football, chess, badminton + many more
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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