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Microsoft Senior Logic Design Engineer 
United States, Texas, Austin 
334309257

13.08.2024

cutting edge

Senior Logic Design Engineertechnical environment.

Required Qualifications:

  • + years of related technical engineering experience
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND4+ years technical engineering experience or internship experience
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND3+ years technical engineering experience or internship experience
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
  • 4+ years experienceinhigh-speeddigitallogic design including microarchitecture specification development, RTL coding in Verilog/System Verilog,designverification collaboration,and CDC/Lint
  • 4+ years of experience insynthesis,floorplanning,timing constraints,power/performance/ area (PPA) trade-offs,andpost-silicond
  • Experience in one or more of the following:
  • High-performance memory subsystems and multi-level caches
  • System knowledge(software/firmware/hardware interactions and optimization)
  • -throughput processor design
  • Industry-standard bus interfacessuch asthe Advanced Microcontroller Bus Architecture (AMBA)AdvancedeXtensibleInterface (AXI) protocols
  • Fixed andfloating-pointarithmeticdatapathdesign and optimization
  • Fabric and interconnect

Other Requirements:

, customer and/or government security screening requirementsfor this role. These requirements include but are not limited to the Microsoft Cloud Background Check: This position will beto pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.


Preferred Qualifications:

  • 0+years of industry experience in logic design delivering complex solutions.
  • SuccessfulApplication-Specific Integrated Circuit(ASIC) tape outs in deep sub-micron technologies.
  • Scripting language such as Python or Perl.
  • Good background in debugging designs as well as simulation environment.
  • Knowledge of verification principles, testbenches, Universal Verification Methodology (UVM), and coverage.
  • Experience working on Artificial Intelligence (AI) / Machine Learning (ML)
  • Working knowledge of writing assertions,coverage,and formal verification.
  • Effective communicationskills, self-motivation, and

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

Microsoft will accept applications for the role until August 13, 2024.

Responsibilities
  • Establish yourself as an integral member of adigital logic designteam for the development ofAIcomponents with focus on micro-architectural based functions and features.
  • Be responsible for
    • Logic design/Register Transfer Level (RTL)entry
    • Designquality,including:Lint,Clock Domain Crossing (CDC),Reset Domain Crossing (RDC),poweretc.
    • Timing closure of high-performance digital Intellectual Property (IP)
    • Silicon validation
  • Collaborate with the verification team to ensure the implementation meets both architectural and micro-architectural intent.
  • Interface witharchitecture,physical design (PD), design for test(DFT), and other teams tooptimizetradeoffs within the design.
  • Provide technical leadership through mentorship and teamwork.
  • Other
    • Embody our and