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Qualcomm Digital Design Engineer Power Management ASICs 
Singapore, Singapore 
330916114

19.11.2024

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field.

Job Description

Digital Design Engineer for Mixed-Signals IPs, ASICs and Chipsets used in Qualcomm Snapdragon power solutions. IPs include telemetry ADCs, 100W+ charging (Quick Charge 5.0), 5G power (mmW, envelope tracking, high performance low noise oscillators etc…) and high efficiency power management (DC-DC charge pumps, bucks and linear regulators).

  • Work includes partnering with international teams in all stages of development from system definition to high-volume (100M+) OEM launches.

  • Successful applicants will be responsible for participating in, or leading, the design of state-of-the-art Mixed-Signals ASICs in advanced digital deep sub-micron CMOS processes for multi-function mobile platforms.

  • Responsibilities will include all, or some, of the following:

  • Micro-architecture of chipset, chip and IP-level designs (designs include firmware, RTL and analog hard macros)

  • Negotiating and executing System specification and requirements

  • Actively involved in all aspects of the front-end design from Architecture definition/RTL development/Simulation/Synthesis/DFT Insertion/Static Timing closure and closely work with the Place and Route function.

  • Document ASIC development, hold detailed design reviews with cross-functional teams, generate and maintain design schedules.

Preferred Qualifications

MS+2 Years ASIC design, verification, or related work experience

Applicants should have sound digital design principles with exposure to Front-end Digital design tools – HDL, RTL Linting, CDC, Synthesis, BIST/SCAN insertion, STA.

Strong communication and organizational skills

Strong process-oriented mindset.

Minimum Qualifications

Bachelor's degree in Science, Engineering, or related field.

3+ years ASIC design, verification, or related work experience

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.