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Apple SOC Design Verification Internship m/f/d Germany, Bavaria, Munich 31200773
18.01.2025
Description
In this student role, you will part of the SoC Design Verification Team working on sophisticated SoC's for products. You will develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors. Moreover, you will collaborate with the architecture and design teams to ensure that potential issues are taken care of as early as possible in the design cycle. With mentorship, you will implement various components of the verification environment and participate in debugging testbench code as well as deep design debug. You will also be involved in Post Silicon Validation. This is a phenomenal chance to develop expertise in SoC design verification.
Minimum Qualifications
- Currently enrolled in your last year of studies in a CE, EE, CS or related field.
- Coursework or exposure to sophisticated computer architecture, logic design and design verification techniques
- Coursework or exposure to OOP programming using HDLs/HVLs such at SystemVerilog or C/C++
- Excellent interpersonal skills and well-organized working style
- Ability to work well in a team and be productive under tight schedules
- Fluent in the English Language (verbal and written)
Preferred Qualifications
- A basic understanding of analog circuitry and digital design is desired but not vital
- Available for six months or more
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