Bachelor's degree in Electrical Engineering, Computer Engineering, a related field, or equivalent practical experience.
Experience with design from micro-architecture through implementation with Verilog/SystemVerilog, or VHDL language.
Scripting experience.
Preferred qualifications:
Experience with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation).
Experience with chip design flow, physical design, IP integration, DFT.