Intel AI Connectivity Performance Architect 

Israel, Center District, Petah Tikva 

268514464

Develops endtoend architecture performance models and including development of the target architecture state in silicon domain subsystem. Drives innovative technologies development for domain subsystems such as caches, IO, transport layer and network subsystems. Influences industry standards and supports ecosystem enabling and customers during architecture definition. Invents, conceptualizes, and specifies microarchitecture and architectural features for future generations or products to deliver optimized subsystems for AI connectivity products. Develops tests, test plans, and testing infrastructure for new architectures/features for subsystems, performs perfomance modeling simulations, and conducts analysis of test results using advanced statistics and data predictions for benchmarking performance and determining areas for improvement. Applies knowledge of domain technologies and translates domain requirements into blueprints for business process, data, infrastructure, applications, or platforms to be configured or created. Collaborates with cross functional teams (including driver and firmware) and defines software configuration control requirement for the technology domain.Minimum Qualifications: � 10 years of hands-on experience high speed networking semiconductor design and architecture, spanning stateful protocol processing, and datapath traffic management. �Design of cache subsystems, I/O interfaces PCIe, RDMA transport layer including ROCE, performance modeling with mirco-architecture and RTL level fidelity, and hardware/software interaction. Hands-on operation of DV environments, creation of test plans, and results analysis. Ability to lead and manage other performance engineers and DV engineers. Thorough specification generation ability for device functionality at Arch, microarch, and performance model level. Preferred Qualifications: �In depth knowledge of IBTA specifications (LWG) and its implementations. �Accelerated system familiarity including CPUs, GPUs, custom ML accelerators. �Proven ability to develop working silicon with predictable schedule �Effective at internal and external facing interactionsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits
This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.