Job Description:- Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements.
- Defines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm to graphics microarchitecture specifications.
- Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment.
- Finds and implements corrective measures to resolve failing tests. Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
- Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
- Maintains and improves existing functional verification infrastructure and methodology.
- Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.
Minimum Qualifications:
- BE/Btech in Electronics or Computer Engineering or any STEM related degree with 6+ year of relevant experience in front end verification at unit/block/IP level or Master's Degree in Electronics or Computer Engineering or any STEM related degree with 5+ years of relevant experience in front end verification at unit/block/IP level
- Test Bench bring-up at unit/block/IP level and strong programming skills in System Verilog, OVM or UVM.
- Basic knowledge/Experience on End to End Val cycle, starting from Test Plan till coverage closures/val sign-off.
- Must be able to work individually with minimal dependency/inputs and should be able to help juniors.
- Experience with industry standard frontend design and verification flows, tools, methodology
Preferred Qualifications:
- GPU Verification will be a plus
- Prefer understanding of Graphics architecture.
- Expertise with RTL verification and validation microarchitecture using Verilog, System Verilog Experience with coverage driven verification testbench development functional modelling and test writing.
- Experience with scripting shell, PERL, any other language.
Experienced HireShift 1 (India)India, Bangalore