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Google Full Chip Design Verification Engineer Silicon India, Karnataka, Bengaluru 23848611
08.04.2024
Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering or equivalent practical experience.
- 3 years of experience in Design Verification, verifying digital logic at RTL level using C/C++, SystemVerilog or UVM.
- Experience creating and using verification components and environments in standard verification methodology.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Science, or a related technical field.
- 3 years of experience in Design Verification.
- Experience with verification techniques and the full verification life cycle.
- Experience with multiple SOC projects/cycles or more products.
- Experience in Power aware verification, Gate level simulations, and Post silicon bring-up.
- Familiarity with ASIC standard interfaces and memory system architecture.
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