Your Role and Responsibilities- Lead the architecture, design and development of an Interrupt Controller for a highly virtualized, multi-threaded, many-core and multi-socket SMP (symmetric multi-processor)
- Develop the features, present the proposed architecture in the High level design discussions to hardware and software teams
- Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, firmware, software teams to develop the feature
- Signoff the Pre-silicon Design that meets all the functional, area and timing goals
- Participate in silicon bring-up and validation of the hardware
- Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums.
- Estimate the overall effort to develop the feature
- Estimate the silicon area required for the feature
Required Technical and Professional Expertise
- 8 to 15 years of relevant experience
- At least 1 generation of processor interconnect design delivery leadership (eg UPI, axi, amba, NoC).
- Expertise of SMP coherency
- Experience in different on-chip interconnect topologies (e.g., mesh, crossbar)
- Understanding of various snoop and data network protocols
- Understanding of latency & bandwidth requirements and effective means of implementation
- Working knowledge of queuing theory numa/nuca architecture
- Proficient in HDLs- VHDL / Verilog
- Experience in High speed and Power efficient logic design
- Experience in working with verification, validation, physical design teams for design closure including test plan reviews and verification coverage
- Good understanding of Physical Design and able to collaborate with physical design team for floor planning, wire layer usage and budgets, placement of blocks for achieving high-performance design
- Experience in leading uarch, RTL design teams for feature enhancements.
- Follow agile project leadership principles. Work with the team on estimation and execution plan.
- Ability to quickly understand issues spanning multiple functional domains, switch context frequently and provide solutions to problems, is necessary.
Requirements : Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance.
Preferred Technical and Professional Expertise