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Google Low Power Design Engineer TPU Silicon Google Cloud 
India, Karnataka, Bengaluru 
231487657

25.09.2024
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 3 years of experience in ASIC/SoC development.
  • Experience with ASIC design verification, synthesis, timing analysis.
  • Experience handling Low Power schemes, power roll up, and power estimations.

Preferred qualifications:
  • Experience with programming languages (e.g., Python, C/C++, or Perl).
  • Experience with power optimization and power modeling tools.
  • Experience in SoC designs and integration flows, with knowledge of high performance and low power design techniques.