Intel Senior Full Chip Design Flow Engineer 

Malaysia, Penang 

228494444

Job Description:

TD drives breakthrough research and develops next generation process/packaging technologies, while also running high volume manufacturing operations in its state-of-the-art facilities in Oregon and Arizona.

These same deliverables carry out technology lead vehicle execution for Si validation.

Enablement and optimization of reference flows and design flows on Intel technology play a crucial role in accomplishing DTP's charter.

• Design flow development engineer will work in a team responsible for architecting, executing, and delivery of the EDA design flow for all DTCO activities, technology lead vehicle design, IP design, and product design in TD.
• The design flow will be built on top of a reference flow enabled on Intel technology and released from external EDA vendors.
• The design flow covers all aspects of front-end and back-end design from RTL to GDS, digital and analog, design creation, verification, and signoff.
• The candidate must be result-oriented and capable of disciplined flow execution to meet delivery milestones in a fast-paced environment on advanced technology nodes.
• Prior experience in EDA tool/flow and design environment development is highly desirable. Familiarity with automated SoC design methodology and/or analog/mixed-signal design methodology is a big plus.

Required Experience

• Extensive experience and a profound understanding of the complete physical design flow for SoC projects.
• Good knowledge in IP integration, floor-planning, I/O, bump, RDL planning, hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT, partition hardening, special clock handling, etc.
• Experience in the development of EDA tools, flows and/or design env for digital or analog designs with demonstrated strong programing skills.
• Demonstrated ability to understand and interpret industry EDA trend in response to advanced node requirements, drive design flow initiatives to align.
• Excellent written and verbal communication skills.

Qualifications:

• BS, MS, or PhD degree in electrical engineering, electronics engineering, computer engineering or similar field.
• Demonstrate a minimum of 15 years of industry experience in the development of ASIC full chip tape out and/or physical design flow development experience, EDA tools, or design env for digital or analog designs
• Demonstrate strong programing skills.

Experienced HireShift 1 (Malaysia)Malaysia, Penang