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Google Silicon SoC RTL Design/Integration Engineer Google Cloud 
India, Karnataka, Bengaluru 
219957297

05.08.2024
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
  • 1 year of experience in ASIC development with Verilog/SystemVerilog, VHDL, or Chisel
  • Experience in networking, including working with Ethernet, TCP/IP, buffering, queueing, and scheduling
  • Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT)

Preferred qualifications:
  • Experience with scripting languages (e.g., Python or Perl)
  • Experience in SoC designs and integration flows
  • Knowledge of arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies
  • Knowledge of high performance and low power design techniques