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IBM Functional verification Engineer 
India, Karnataka, Bengaluru 
212943338

04.09.2024

Your Role and Responsibilities
As a formal verification engineer (functional verification), the person is expected to
  • Understand the design specification and logic design implementation understanding
  • Develop the verification environment and test bench from formal perspective (bottom – up approach)
  • Develop skills in IBM Formal verification tools and apply them successfully
  • work with Design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design.


Required Technical and Professional Expertise
3+ years of experience

  • Strong in Formal/Functional Verification – Demonstrated execution experience of verification of logic blocks verification.
  • Knowledge of formal methodology, Knowledge of HDLs (Verilog, VHDL, SV), Good programming skills in python, processor core u-arch skills
  • Exposure in developing testbench environment, debugging and triaging fails
  • Good communication skills and be able to work effectively in a global team environment.
  • Drive verification coverage closure, lead verification team
  • Drive complex scenarios, participate in High level design discussions


Preferred Technical and Professional Expertise

  • Writing test plans, building random / exhaustive formal verification environment, functional and coverage analysis and debug