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Apple Design Verification Engineer 
United States, California, San Diego 
209960043

02.05.2024
Key Qualifications
  • Solid understanding of SystemVerilog test-bench language and UVM
  • Experience developing scalable and portable test-benches
  • Experience with verification methodologies and tools such as simulators, waveform viewers, build and run automation, coverage collection, gate level simulations
  • Experience with serial protocols such as PCIe or USB Experience with IP verification methodology for IPs such as PHYs, PLLs etc.
  • In lieu of UVM knowledge, C/C++ expert level knowledge
  • Working knowledge with one of the scripting languages: Python, Perl, TCL
  • Proven experience in formal verification methodology
Description
In this role, you will be responsible for ensuring a bug-free first silicon for part of the SoC / IP and are encouraged to perform the following tasks:Develop detailed test and coverage plans based on the micro-architecture. Develop verification methodology suitable for the IP, ensuring a scalable and portable environment. Develop verification plans for all features under your care. Execute verification plans, including design bring-up, Design Verification environment bring-up, regression enabling for all features under your care, de-bug of the test failures. Develop block, IP and SoC level test-benches Track and report Design Verification progress using a variety of metrics, including bugs and coverage. Develop IP simulation environment, and work closely with analog team to ensure overall bug-free IP design.
Education & Experience
BS degree in technical subject area and minimum 3 years of meaningful experience.
Pay & Benefits
  • At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $131,500.00 and $243,300.00, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.